? semiconductor components industries, llc, 2011 may, 2011 ? rev. 0 1 publication order number: emi2121mt/d emi2121 single pair common mode filter with esd protection description the emi2121 is an integrated common mode filter providing both esd protection and emi filtering for high speed serial digital interfaces such as usb2.0. the emi2121 provides emi filtering for one differential data line pair and esd protection for one data pair plus a supply input such as usb2.0 vbus or usb id pin. it is supplied in a small rohs-compliant wdfn8 package. features ? highly integrated common mode filter (cmf) with esd protection provides protection and emi reduction for systems using high speed serial data lines with cost and space savings over discrete solutions ? large differential mode bandwidth with cutoff frequency > 2 ghz ? high common mode stop band attenuation: >25 db at 700 mhz, >30 db at 800 mhz typical ? provides esd protection to iec61000-4-2 level 4, 12 kv contact discharge ? low channel input capacitance provides superior impedance matching performance ? low profile package with small footprint in wdfn8 2.0 mm length x 2.2 mm width x 0.75 mm height pb ? free package ? these devices are pb ? free, halogen free/bfr free and are rohs compliant applications ? usb2.0 and other high speed differential data lines in mobile phones and digital still cameras ? mipi d ? phy device package shipping ? ordering information EMI2121MTTAG wdfn8 (pb ? free) 3000/tape & reel wdfn8 case 511bn marking diagram http://onsemi.com 8 7 3,4,5 simplified schematic ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. (note: microdot may be in either location) pin connections 1 8 c2 = specific device code m = date code = pb ? free device c2 m 1 out_1+ out_1 ? in_1+ in_1 ? v dd /i d gnd gnd gnd 18 27 36 45 (top view) gnd internal (asic) external (connector) 2 6 1
emi2121 http://onsemi.com 2 pin description pin no. pin name type description 1 in_1+ i/o cmf channel 1+ to connector 2 in_1 ? i/o cmf channel 1 ? to connector 8 out_1+ i/o cmf channel 1+ to asic 7 out_1 ? i/o cmf channel 1 ? to asic 6 v dd /i d i/o supply protection to connector 3,4,5 gnd gnd ground maximum ratings (t a = 25 c unless otherwise stated) parameter symbol value units operating temperature range t op ? 40 to +85 c storage temperature range t stg ? 65 to +150 c esd discharge iec61000 ? 4 ? 2 contact discharge v pp 12 kv maximum lead temperature for soldering purposes (1/8? from case for 10 seconds) t l 260 c dc current per line i line 100 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. electrical characteristics (t a = 25 c unless otherwise specified) parameter symbol test conditions min typ max unit channel leakage current i leak t a = 25 c, v in = 5 v, gnd = 0 v 1.0 a channel negative voltage v f t a = 25 c, i f = 10 ma 0.1 1.5 v channel input capacitance to ground (pins 1,2,4,5 to pins 3,8) c in t a = 25 c, at 1 mhz, gnd = 0 v, v in = 1.65 v 0.8 1.3 pf channel resistance (pins 1 ? 16, 2 ? 15, 4 ? 13, 5 ? 12, 7 ? 10 and 9 ? 9) rch 8.0 differential mode cut off frequency f 3db 50 source and load termination 2.0 ghz common mode stop band attenuation f atten @ 800 mhz 30 db esd protection ? peak discharge voltage at any channel input, in system: contact discharge per iec61000 ? 4 ? 2 standard v esd t a = 25 c; (notes 1 and 2) pins 1,2,4,5 12 kv tlp clamping voltage (see figure ) v cl forward i pp = 8 a forward i pp = 12 a reverse i pp = ? 8 a reverse i pp = ? 12 a 13 16 ? 6 ? 8.5 v v v v reverse working voltage v rwm (note 3) 5.0 v breakdown voltage v br i t = 1 ma; (note 4) 5.5 9.0 v maximum peak pulse current (pin 6 to gnd) i pp 8x20 s waveform 12 a clamping voltage (pin 6 to gnd) v c i pp = 5 a 10 v dynamic resistance positive transients negative transients r dyn t a = 25c, i pp =1 a, t p = 8/20 us, any i/o to gnd 0.67 0.59 1. standard iec 61000 ? 4 ? 2 with c discharge = 150 pf, r discharge = 330, gnd grounded. 2. these measurements performed with no external capacitor. 3. tvs devices are normally selected according to the working peak reverse voltage (v rwm ), which should be equal or greater than the dc or continuous peak operating voltage level. 4. v br is measured at pulse test current i t .
emi2121 http://onsemi.com 3 figure 1. normal (differential) mode test configuration network analyzer i/o 8 i/o 7 i/o 1 i/o 2 normal (differential) mode figure 2. application circuit i/o 8 i/o 7 i/o 1 i/o 2 differential signal buffer and transmission line differential signal driver and transmission line emi2121mt emi2121mt 1 2 3 4
emi2121 http://onsemi.com 4 typical characteristics figure 3. differential mode attenuation vs. frequency (zdiff = 100 ) figure 4. common mode attenuation vs. frequency (zcomm = 50 ) figure 5. differential return loss vs. frequency (zdiff=100 ) figure 6. differential impedance vs. frequency (zdiff=100 ) figure 7. emi2121 measured eye diagram @ 480 mbps
emi2121 http://onsemi.com 5 transmission line pulse (tlp) measurements transmission line pulse (tlp) provides current versus voltage (i-v) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. a simplified schematic of a typical tlp system is shown in figure 8. tlp i-v curves of esd protection devices accurately demonstrate the product?s esd capability because the 10 s of amps current levels and under 100 ns time scale match those of an esd event. this is illustrated in figure 9 where an 8 kv iec61000-4-2 current waveform is compared with tlp current pulses at 8 and 16 a. a tlp curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. typical tlp i-v curves for the emi2121 are shown in figure 10. figure 8. simplified schematic of a typical tlp system dut v m i m l 10 m v c sw oscilloscope attenuator 50 coax cable 50 coax cable figure 9. comparison between 8 kv iec61000 ? 4 ? 2 and 8 a and 16 a tlp waveforms 0 2 4 6 8 10 12 14 024681012141618 c u r r e n t ( a ) voltage (v) -14 -12 -10 -8 -6 -4 -2 0 -10 -8 -6 -4 -2 0 current (a) voltage (v) figure 10. positive and negative tlp waveforms
emi2121 http://onsemi.com 6 esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000 ? 4 ? 2 waveform. since the iec61000 ? 4 ? 2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconduct or has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to on semiconductor application notes and8307/d and and8308/d. iec61000 ? 4 ? 2 spec. level test voltage (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000 ? 4 ? 2 waveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns 50 50 cable tvs oscilloscope esd gun figure 11. diagram of esd test setup figure 12. 8 x 20 s pulse waveform 100 90 80 70 60 50 40 30 20 10 0 020406080 t, time ( s) % of peak pulse current t p t r pulse width (t p ) is defined as that point where the peak current decay = 8 s peak value i rsm @ 8 s half value i rsm /2 @ 20 s
emi2121 http://onsemi.com 7 figure 13. esd clamping voltage +8 kv per iec6100 ? 4 ? 2 (external to internal pin) figure 14. esd clamping voltage ? 8 kv per iec6100 ? 4 ? 2 (external to internal pin)
emi2121 http://onsemi.com 8 figure 15. emi2121 micro ? usb connector application diagram vbus d+ d ? id micro usb connector gnd d+ d ? id or vbus id or vbus (red= inner layer ) emi 2121
emi2121 http://onsemi.com 9 package dimensions wdfn8, 2.2x2, 0.5p case 511bn ? 01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.25 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 e2 bottom view b e 7x 0.10 b 0.05 a c c note 3 2x 0.10 c pin one reference top view 2x 0.10 c 9x a a3 0.05 c 0.05 c c seating plane side view l 1 4 5 8 dim min max millimeters a 0.70 0.80 a1 0.00 0.05 b 0.15 0.25 d 2.20 bsc d2 0.34 0.54 e 2.00 bsc e2 0.60 0.80 e 0.50 bsc l1 0.05 0.15 l2 0.30 0.50 l3 0.15 0.25 4x 1.00 0.80 1 0.30 0.50 pitch 2.30 7x dimensions: millimeters *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. recommended l1 detail a optional constructions l ?? package outline a3 0.20 ref note 4 a1 e/2 0.10 b a c 0.10 b a c 0.54 ?? ?? a1 a3 b1 0.25 0.35 l 0.75 0.95 detail c l3 b2 l2 2x detail a 4x soldering footprint* 0.40 0.60 4x on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 emi2121mt/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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